1. Field of the Invention
This invention relates to computer software and systems used in the design of electronic components and more particularly to the automatic generation of megacells in a computer system used in the design and layout of integrated circuits.
2. Description of the Background Art
Referring now to FIG. 1, a block diagram is shown illustrating a conventional IC design system 100 typically used in the design and layout of integrated circuits. Logic designs 103 are conventionally entered into the system 100 in the form of graphical schematic diagrams or as systems of Boolean equations. Other forms of logic design 103 entry include VHDL (VHSIC Hardware Description Language) descriptions and RTL (Register Transfer Language) descriptor sequences. Once the logic designs 103 are entered into the system, a net list 105 is conventionally produced using ECAD (Electronic Computer Aided Design) net list extraction tools such as Schematic Compiler, which generates net lists from schematics. Schematic Compiler is a component of Concurrent Modular Design Environment (C-MDE.TM.), manufactured by LSI Logic Corporation of Milpitas, Calif. A computer net list 105 consists of a listing of circuit devices such as transistors followed by sequences of attributes which include node numbers, electrical parameters, and physical device sizes. A variety of conventional net list formats are commonly used and understood by those skilled in the art. Once the net list 105 is generated, the electronic circuit design is converted to a physical layout design using a conventional place and route 107 computer program such as Block Compiler. Block Compiler is a component software utility of C-MDE which attempts to place and route the given net list within area constraints defined by the user. Conventional placement and routing, at best, is generally a semi-automatic process, where the design engineers enter specific layout constraints and make adjustments to the physical design as the process proceeds. Once a computer generated placement and routing occurs the physical design is examined and manual specifications are then applied to the placement shown in block 109. The steps of placement and routing 107 and adjustment using manual specifications 109 is iterated until a finished layout is produced in block 111.
The two common design criteria which are used as measures of performance in placement and routing 107 are circuit speed and physical design compactness. Two important goals in circuit design are to design circuits that operate at high speed and to produce circuits that require a minimum amount of electrical floor space. Greater circuit speeds enable the circuits to operate faster and thereby produce more functionality per unit time. Improved compactness enables savings in a variety of areas including manufacturing costs, power dissipation, and yield of parts manufactured. Since circuit devices which are packed more closely together tend to suffer less from transmission delay at high frequency, it is generally accepted that more compact circuits tend to run faster and more reliably.
Design intervention is required with manual specifications at block 109 in order to achieve optimal speed and compactness in the routing process. When low complexity circuit designs are involved, automated placement and routing systems 107 tend to do a reasonably good job of providing acceptable design performance. However, as the logic designs become more complex, manual intervention in the form of manual specifications 109 are more frequently required.
Design intervention is very time consuming and requires circuit designers who are highly knowledgeable both in circuit design and in the placement and routing of integrated circuits. Particularly as integrated circuits become more complex and run at higher operating speeds, the requirement for high levels of design skill on the part of the circuit designer will only increase. It has long been a goal of ECAD system design to enable less skilled integrated circuit designers to produce finished layouts while focusing attention on the logic design and not on the placement and routing required to produce the finished layout 111.
What is needed is an electrical computer aided design system which enables manual specifications to be inserted at the logic design stage in a way that the iterative requirement to intervene in the place and route process is eliminated.